__DefBitFieldType MEMDType<3>
    S8;
    U8;
    S16;
    U16;
    32;
    64;
    128;

// TODO:
__DefBitFieldType MEMScope<1>
    // BLK;
    TC;
    GPU;
    // SYS;

// TODO: constant???
__DefBitFieldType MEMOrder<2>
    WEAK;
    STRONG;
    MMIO;

// TODO: no prefetch size?
// __DefBitFieldType MEMPrefetch<2>

// TODO:
// addr register as s32 or u64
// [Ra.S32+URb.U64]
// [Ra.U64+URb.S32]
__DefBitFieldType ADDRMode<1>
    S32;
    U64;

__DefBitFieldType L1EvictPriority<3>
    //* Evict normal
    EN;
    //* Evict first
    EF;
    //* Evict last
    EL;
    //* Last Use = Evict first
    // LU;  //
    //* Evict unchanged
    EU;
    //* No allocate
    NA;

__DefBitFieldType RStride<2>
    X1;
    X4;
    X8;
    X16;

// DEPBAR.LE / DEPBAR.ALL ??

__DefBitFieldType CCTLOp<3>
    //* prefetch to L1
    PF1;
    //* prefetch to L2
    PF2;
    //* prefetch.global.L2::evict_last
    PML2;
    //* applypriority.global.L2::evict_normal [a], size;
    DML2;
    //* discard.global.L2 [a], size;
    RML2;
    //* write back
    WB;
    //* invalidate
    IV;

__DefBitFieldType CCTLAllOp<1>
    WBALL;
    IVALL;

//* For querying state space for generic address
__DefBitFieldType MEMSpace<2>
    G;
    S;
    L;
    C;

__DefBitFieldType LDSMSize<2>
    16;
    // U4TO8/S4TO8/U2TO4/S2TO4

__DefBitFieldType LDSMMode<2>
    M88;
    MT88;
    // M816/M832?

__DefBitFieldType LDSMNum<2>
    1;
    2;
    4;

__DefBitFieldType ATOMOp<4>
    CAS;
    CAST;//??? = CAST.SPIN, only for ATOMS?

    EXCH;

    ADD;
    MIN;
    MAX;
    INC;
    DEC;

    AND;
    OR;
    XOR;

__DefBitFieldType REDOp<3>
    ADD;
    MIN;
    MAX;
    INC;
    DEC;

    AND;
    OR;
    XOR;

__DefBitFieldType ATOMDType<3>
    U32;
    S32;
    U64;
    S64;
    F32;
    F16x2;
    BF16x2;
    F64;

__DefBitFieldType ATOMScope<1>
    GPU;
    SYS;

__DefBitFieldType MEMBARMode<1>
    ALL;
    SC;

__DefBitFieldType LDGSTSCacheOp<1>
    BYPASS;
    ACCESS;

__DefBitFieldType LDGSTSSize<2>
    32;
    64;
    128;

__DefBitFieldType LDGSTSFILL<1>
    NoZFILL;
    ZFILL;

__DefGroup M_RUI // for all patterns with [Ra+URb+SImm?]
  __Encoding
    field<24,  8> Reg ra=RZ;
    field<32,  6> UReg urb=URZ;
    field<40, 24> SImm24 offset=0x0; // 24 or 26bit?

__DefGroup M_RI // for all patterns with [Ra+URb+SImm?]
  __Encoding
    field<24,  8> Reg ra=RZ;
    field<40, 24> SImm24 offset=0x0; // 24 or 26bit?

__DefGroup LSU : [ALL]
  __Encoding
    field<12,  3> Pred pg = PT;
    field<15,  1> PModi pg.not = False;

__DefGroup LD_OP : [LSU]
  __Encoding
    field<16,  8> Reg rd;

    field<98, 3> Pred pp=PT;
    field<101, 1> PModi pp.not=False;

__DefGroup ST_OP : [LSU]
  __Encoding
    field<64,  8> Reg rc;

__DefGroup GMODI
  __Encoding
    field<80, 3> MEMDType dtype=32;
    field<83, 2> MEMOrder ord=WEAK;
    field<85, 1> MEMScope sco=TC;
    field<86, 3> L1EvictPriority l1prio=EN;

__DefGroup ADDRMODI_RU
  __Encoding
    field<90, 1> ADDRMode ra.addrmode=U64;
    field<91, 1> ADDRMode urb.addrmode=U64;
  __Exception
    EncodingError<IllegalBitFieldCombination, "At least one of ra.addrmode/urb.addrmode should be U64."> = (ra.addrmode!="U64") and (urb.addrmode!="U64");

__DefGroup ADDRMODI_R
  __Encoding
    field<90, 1> ADDRMode ra.addrmode=U64;

// Global LD/ST
__DefOptype LDG : [LD_OP, GMODI]
  __Encoding
    field<0,  8> Optype optype==LDG;

__DefOpcode LDG_RU : [LDG, M_RUI, ADDRMODI_RU]
  __Encoding
    field<8,  4> SType stype==RU;
  __OperandInfo
    InList<pg, ra, urb, pp>;
    OutList<rd>;
    Order<pg, rd, M[ra, urb, offset], pp>;
    Bitwidth<ra> = (ra.addrmode=="S32")*32 + (ra.addrmode=="U64")*64;
    Bitwidth<urb> = (urb.addrmode=="S32")*32 + (urb.addrmode=="U64")*64;
    Bitwidth<rd> = 32 + (dtype=="64")*32 + (dtype=="128")*96;

__DefOptype STG : [ST_OP, GMODI]
  __Encoding
    field<0,  8> Optype optype==STG;

__DefOpcode STG_RUR : [STG, M_RUI, ADDRMODI_RU]
  __Encoding
    field<8,  4> SType stype==RUR;
  __OperandInfo
    InList<pg, ra, urb, rc>;
    OutList<>;
    Order<pg, M[ra, urb, offset], rc>;
    Bitwidth<ra> = (ra.addrmode=="S32")*32 + (ra.addrmode=="U64")*64;
    Bitwidth<urb> = (urb.addrmode=="S32")*32 + (urb.addrmode=="U64")*64;
    Bitwidth<rc> = 32 + (dtype=="64")*32 + (dtype=="128")*96;

// Shared LS/ST

__DefGroup SMODI
  __Encoding
    field<80, 3> MEMDType dtype=32;
    field<90, 2> RStride ra.rstride = X1;

__DefOptype LDS : [LD_OP]
  __Encoding
    field<0,  8> Optype optype==LDS;

__DefOpcode LDS_RU : [LDS, M_RUI, SMODI]
  __Encoding
    field<8,  4> SType stype==RU;
  __OperandInfo
    InList<pg, ra, urb, pp>;
    OutList<rd>;
    Order<pg, rd, M[ra, urb, offset], pp>;
    Bitwidth<ra>=32;
    Bitwidth<urb>=32;
    Bitwidth<rd> = 32 + (dtype=="64")*32 + (dtype=="128")*96;

__DefOptype STS : [ST_OP]
  __Encoding
    field<0,  8> Optype optype==STS;

__DefOpcode STS_RUR : [STS, M_RUI, SMODI]
  __Encoding
    field<8,  4> SType stype==RUR;
  __OperandInfo
    InList<pg, ra, urb, rc>;
    OutList<>;
    Order<pg, M[ra, urb, offset], rc>;
    Bitwidth<ra>=32;
    Bitwidth<urb>=32;
    Bitwidth<rc> = 32 + (dtype=="64")*32 + (dtype=="128")*96;

__DefGroup SMMODI
  __Encoding
    field<80, 2> LDSMSize size=16;
    field<82, 2> LDSMMode mode;
    field<84, 2> LDSMNum num=1;

__DefOptype LDSM : [LD_OP, SMMODI]
  __Encoding
    field<0,  8> Optype optype==LDSM;

__DefOpcode LDSM_RU : [LDSM, M_RUI]
  __Encoding
    field<8,  4> SType stype==RU;
  __OperandInfo
    InList<pg, ra, urb, pp>;
    OutList<rd>;
    Order<pg, rd, M[ra, urb, offset], pp>;
    Bitwidth<ra>=32;
    Bitwidth<urb>=32;
    Bitwidth<rd> = 32 + (num=="2")*32 + (num=="4")*96;

__DefOptype STSM : [ST_OP, SMMODI]
  __Encoding
    field<0,  8> Optype optype==STSM;

__DefOpcode STSM_RUR : [STSM, M_RUI]
  __Encoding
    field<8,  4> SType stype==RUR;
  __OperandInfo
    InList<pg, ra, urb, rc>;
    OutList<>;
    Order<pg, M[ra, urb, offset], rc>;
    Bitwidth<ra>=32;
    Bitwidth<urb>=32;
    Bitwidth<rc> = 32 + (num=="2")*32 + (num=="4")*96;

// Local LD/ST
__DefGroup LMODI
  __Encoding
    field<80, 3> MEMDType dtype=32;
    field<86, 3> L1EvictPriority l1prio=EN;

__DefOptype LDL : [LD_OP, LMODI]
  __Encoding
    field<0,  8> Optype optype==LDL;

__DefOpcode LDL_RU : [LDL, M_RUI]
  __Encoding
    field<8,  4> SType stype==RU;
  __OperandInfo
    InList<pg, ra, urb, pp>;
    OutList<rd>;
    Order<pg, rd, M[ra, urb, offset], pp>;
    Bitwidth<ra>=32;
    Bitwidth<urb>=32;
    Bitwidth<rd> = 32 + (dtype=="64")*32 + (dtype=="128")*96;

__DefOptype STL : [ST_OP, LMODI]
  __Encoding
    field<0,  8> Optype optype==STL;

__DefOpcode STL_RUR : [STL, M_RUI]
  __Encoding
    field<8,  4> SType stype==RUR;
  __OperandInfo
    InList<pg, ra, urb, rc>;
    OutList<>;
    Order<pg, M[ra, urb, offset], rc>;
    Bitwidth<ra>=32;
    Bitwidth<urb>=32;
    Bitwidth<rc> = 32 + (dtype=="64")*32 + (dtype=="128")*96;

// Generic LD/ST
__DefOptype LD : [LD_OP, GMODI]
  __Encoding
    field<0,  8> Optype optype==LD;

__DefOpcode LD_RU : [LD, M_RUI, ADDRMODI_RU]
  __Encoding
    field<8,  4> SType stype==RU;
  __OperandInfo
    InList<pg, ra, urb, pp>;
    OutList<rd>;
    Order<pg, rd, M[ra, urb, offset], pp>;
    Bitwidth<ra> = (ra.addrmode=="S32")*32 + (ra.addrmode=="U64")*64;
    Bitwidth<urb> = (urb.addrmode=="S32")*32 + (urb.addrmode=="U64")*64;
    Bitwidth<rd> = 32 + (dtype=="64")*32 + (dtype=="128")*96;

__DefOptype ST : [ST_OP, GMODI]
  __Encoding
    field<0,  8> Optype optype==ST;

__DefOpcode ST_RUR : [ST, M_RUI, ADDRMODI_RU]
  __Encoding
    field<8,  4> SType stype==RUR;
  __OperandInfo
    InList<pg, ra, urb, rc>;
    OutList<>;
    Order<pg, M[ra, urb, offset], rc>;
    Bitwidth<ra> = (ra.addrmode=="S32")*32 + (ra.addrmode=="U64")*64;
    Bitwidth<urb> = (urb.addrmode=="S32")*32 + (urb.addrmode=="U64")*64;
    Bitwidth<rc> = 32 + (dtype=="64")*32 + (dtype=="128")*96;

__DefGroup ATOMMODI
  __Encoding
    field<80,  4> ATOMOp atomop;
    field<84,  3> ATOMDType dtype=S32;

// ATOM
__DefOptype ATOMG : [LSU, ATOMMODI]
  __Encoding
    field<0,  8> Optype optype==ATOMG;

    field<16,  8> Reg rd;
    field<64,  8> Reg rc;

    // field<87,  1> ATOMScope scope;
    field<106, 3> Pred pu;

__DefOpcode ATOMG_RUR : [ATOMG, M_RUI, ADDRMODI_RU]
  __Encoding
    field<8,  4> SType stype==RUR;
  __OperandInfo
    InList<pg, ra, urb, rc>;
    OutList<rd, pu>;
    Order<pg, rd, pu, M[ra, urb, offset], rc>;
    Bitwidth<ra> = (ra.addrmode=="S32")*32 + (ra.addrmode=="U64")*64;
    Bitwidth<urb> = (urb.addrmode=="S32")*32 + (urb.addrmode=="U64")*64;
    Bitwidth<rc> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;
    Bitwidth<rd> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;

__DefOpcode ATOMG_RRR : [ATOMG, M_RI, ADDRMODI_R]
  __Encoding
    field<8,  4> SType stype==RRR;
    field<32, 8> Reg rb;
  __OperandInfo
    InList<pg, ra, rb, rc>;
    OutList<rd, pu>;
    Order<pg, rd, pu, M[ra, offset], rb, rc>;
    Bitwidth<ra> = (ra.addrmode=="S32")*32 + (ra.addrmode=="U64")*64;
    Bitwidth<rb> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;
    Bitwidth<rc> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;
    Bitwidth<rd> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;

__DefOptype ATOMS : [LSU, ATOMMODI]
  __Encoding
    field<0,  8> Optype optype==ATOMS;

    field<16,  8> Reg rd;
    field<64,  8> Reg rc;
    field<106, 3> Pred pu;

__DefOpcode ATOMS_RUR : [ATOMS, M_RUI]
  __Encoding
    field<8,  4> SType stype==RUR;
  __OperandInfo
    InList<pg, ra, urb, rc>;
    OutList<rd, pu>;
    Order<pg, rd, pu, M[ra, urb, offset], rc>;
    Bitwidth<ra> = 32;
    Bitwidth<urb> = 32;
    Bitwidth<rc> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;
    Bitwidth<rd> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;

__DefOpcode ATOMS_RRR : [ATOMS, M_RI]
  __Encoding
    field<8,  4> SType stype==RRR;
    field<32, 8> Reg rb;
  __OperandInfo
    InList<pg, ra, rb, rc>;
    OutList<rd, pu>;
    Order<pg, rd, pu, M[ra, offset], rb, rc>;
    Bitwidth<ra> = 32;
    Bitwidth<rb> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;
    Bitwidth<rc> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;
    Bitwidth<rd> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;

__DefOptype ATOM : [LSU, ATOMMODI]
  __Encoding
    field<0,  8> Optype optype==ATOM;

    field<16,  8> Reg rd;
    field<64,  8> Reg rc;

    // field<87,  1> ATOMScope scope;
    field<106, 3> Pred pu;

__DefOpcode ATOM_RUR : [ATOM, M_RUI, ADDRMODI_RU]
  __Encoding
    field<8,  4> SType stype==RUR;
  __OperandInfo
    InList<pg, ra, urb, rc>;
    OutList<rd, pu>;
    Order<pg, rd, pu, M[ra, urb, offset], rc>;
    Bitwidth<ra> = (ra.addrmode=="S32")*32 + (ra.addrmode=="U64")*64;
    Bitwidth<urb> = (urb.addrmode=="S32")*32 + (urb.addrmode=="U64")*64;
    Bitwidth<rc> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;
    Bitwidth<rd> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;

__DefOpcode ATOM_RRR : [ATOM, M_RI, ADDRMODI_R]
  __Encoding
    field<8,  4> SType stype==RRR;
    field<32, 8> Reg rb;
  __OperandInfo
    InList<pg, ra, rb, rc>;
    OutList<rd, pu>;
    Order<pg, rd, pu, M[ra, offset], rb, rc>;
    Bitwidth<ra> = (ra.addrmode=="S32")*32 + (ra.addrmode=="U64")*64;
    Bitwidth<rb> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;
    Bitwidth<rc> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;
    Bitwidth<rd> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;
// LDC

__DefOptype LDC : [LSU]
  __Encoding
    field<0,   8> Optype optype==LDC;
    field<16,  8> Reg rd;
    field<32, 22> CMem vb;
    field<80,  3> MEMDType dtype = 32;
  __Exception
    EncodingError<IllegalBitFieldValue, "LDC/ULDC doesnot support 128bit load."> = dtype=="128";

__DefOpcode LDC_RC : [LDC]
  __Encoding
    field<8,   4> SType stype==RC;
    field<24,  8> Reg ra;
  __OperandInfo
    InList<pg, ra, vb>;
    OutList<rd>;
    Order<pg, rd, C[vb, ra]>;
    Bitwidth<ra> = 32;
    Bitwidth<vb> = 32 + (dtype=="64")*32; // TODO???
    Bitwidth<rd> = 32 + (dtype=="64")*32;

__DefOpcode LDC_U : [LDC]
  __Encoding
    field<8,   4> SType stype==U;
    field<24,  6> UReg ura;
  __OperandInfo
    InList<pg, ura, vb>;
    OutList<rd>;
    Order<pg, rd, C[vb, ura]>;
    Bitwidth<ura> = 32;
    Bitwidth<vb> = 32 + (dtype=="64")*32; // TODO???
    Bitwidth<rd> = 32 + (dtype=="64")*32;
// LDGSTS

__DefOptype LDGSTS : [LSU]
  __Encoding
    field<0,  8> Optype optype==LDGSTS;

__DefOpcode LDGSTS_RUR : [LDGSTS, M_RUI, ADDRMODI_RU]
  __Encoding
    field<8,   4> SType stype==RUR;

    field<64,  8> Reg rs;
    field<72, 16> SImm16 soffset;

    field<88,  1> LDGSTSCacheOp cop=ACCESS;
    field<92,  2> LDGSTSSize size=32;
    field<94,  1> LDGSTSFILL zfill=NoZFILL;

    field<98, 3> Pred pp=PT;
    field<101, 1> PModi pp.not=False;
  __OperandInfo
    InList<pg, ra, urb, rs, pp>;
    OutList<>;
    Order<pg, M[rs, soffset], M[ra, urb, offset], pp>;
    Bitwidth<ra> = (ra.addrmode=="S32")*32 + (ra.addrmode=="U64")*64;
    Bitwidth<urb> = (urb.addrmode=="S32")*32 + (urb.addrmode=="U64")*64;
    Bitwidth<rs> = 32;

// LDGSTS

__DefOptype LDSSTG : [LSU]
  __Encoding
    field<0,  8> Optype optype==LDSSTG;

__DefOpcode LDSSTG_RUR : [LDSSTG, M_RUI, ADDRMODI_RU]
  __Encoding
    field<8,   4> SType stype==RUR;

    field<64,  8> Reg rs;
    field<72, 16> SImm16 soffset;

    field<88,  1> LDGSTSCacheOp cop=ACCESS;
    field<92,  2> LDGSTSSize size=32;
    field<94,  1> LDGSTSFILL zfill=NoZFILL;

    field<98, 3> Pred pp=PT;
    field<101, 1> PModi pp.not=False;
  __OperandInfo
    InList<pg, ra, urb, rs, pp>;
    OutList<>;
    Order<pg, M[ra, urb, offset], M[rs, soffset], pp>;
    Bitwidth<ra> = (ra.addrmode=="S32")*32 + (ra.addrmode=="U64")*64;
    Bitwidth<urb> = (urb.addrmode=="S32")*32 + (urb.addrmode=="U64")*64;
    Bitwidth<rs> = 32;

// RED
__DefOptype RED : [ST_OP]
  __Encoding
    field<0,  8> Optype optype==RED;
    field<80, 3> REDOp redop;
    field<83, 3> ATOMDType dtype=S32;

    field<106, 3> Pred pu; // For function availablity check

__DefOpcode RED_RUR : [RED, M_RUI, ADDRMODI_RU]
  __Encoding
    field<8,  4> SType stype==RUR;
  __OperandInfo
    InList<pg, ra, urb, rc>;
    OutList<pu>;
    Order<pg, pu, M[ra, urb, offset], rc>;
    Bitwidth<ra> = (ra.addrmode=="S32")*32 + (ra.addrmode=="U64")*64;
    Bitwidth<urb> = (urb.addrmode=="S32")*32 + (urb.addrmode=="U64")*64;
    Bitwidth<rc> = 32 + (dtype=="S64")*32 + (dtype=="U64")*32 + (dtype=="F64")*32;

// Others
__DefOptype CCTL : [LSU]
  __Encoding
    field<0,  8> Optype optype==CCTL;

__DefOpcode CCTL_X : [CCTL]
  __Encoding
    field<8,  4> SType stype == X;

    field<80, 1> CCTLAllOp cop;
  __OperandInfo
    InList<pg>;
    OutList<>;
    Order<pg>;

__DefOpcode CCTL_RU : [CCTL, M_RUI, ADDRMODI_RU]
  __Encoding
    field<8,  4> SType stype == RU;

    field<80, 3> CCTLOp cop;

  __OperandInfo
    InList<pg, ra, urb>;
    OutList<>;
    Order<pg, M[ra, urb, offset]>;
    Bitwidth<ra> = (ra.addrmode=="S32")*32 + (ra.addrmode=="U64")*64;
    Bitwidth<urb> = (urb.addrmode=="S32")*32 + (urb.addrmode=="U64")*64;

__DefOptype CCTLL : [LSU]
  __Encoding
    field<0,  8> Optype optype==CCTLL;

__DefOpcode CCTLL_X : [CCTLL]
  __Encoding
    field<8,  4> SType stype == X;
    field<80, 1> CCTLAllOp cop;
  __OperandInfo
    InList<pg>;
    OutList<>;
    Order<pg>;

__DefOpcode CCTLL_RU : [CCTLL, M_RUI, ADDRMODI_RU]
  __Encoding
    field<8,  4> SType stype == RU;
    field<80, 3> CCTLOp cop;
  __OperandInfo
    InList<pg, ra, urb>;
    OutList<>;
    Order<pg, M[ra, urb, offset]>;
    Bitwidth<ra> = (ra.addrmode=="S32")*32 + (ra.addrmode=="U64")*64;
    Bitwidth<urb> = (urb.addrmode=="S32")*32 + (urb.addrmode=="U64")*64;

__DefOptype QSPC : [LSU]
  __Encoding
    field<0,  8> Optype optype==QSPC;
    field<80, 2> MEMSpace sp;
    field<106, 3> Pred pu;
  __Semantics

    TODO: QSPC 取决于硬件是用专用bit还是开窗方式查询地址空间，如使用额外bit，则QSPC可软件实现。

__DefOpcode QSPC_RU : [QSPC, M_RUI, ADDRMODI_RU]
  __Encoding
    field<8,  4> SType stype == RU;
  __OperandInfo
    InList<pg, ra, urb>;
    OutList<pu>;
    Order<pg, pu, M[ra, urb, offset]>;
    Bitwidth<ra> = (ra.addrmode=="S32")*32 + (ra.addrmode=="U64")*64;
    Bitwidth<urb> = (urb.addrmode=="S32")*32 + (urb.addrmode=="U64")*64;

__DefOptype LDGDEPBAR : [LSU]
  __Encoding
    field<0,  8> Optype optype==LDGDEPBAR;

__DefOpcode LDGDEPBAR_X : [LDGDEPBAR]
  __Encoding
    field<8,  4> SType stype==X;
  __OperandInfo
    InList<pg>;
    OutList<>;
    Order<pg>;

__DefOptype MEMBAR : [LSU]
  __Encoding
    field<0,  8> Optype optype==MEMBAR;
    field<80, 1> MEMScope sp;
    field<82, 1> MEMBARMode mode;

__DefOpcode MEMBAR_X : [MEMBAR]
  __Encoding
    field<8,  4> SType stype==X;
  __OperandInfo
    InList<pg>;
    OutList<>;
    Order<pg>;

__DefOptype ERRBAR : [LSU]
  __Encoding
    field<0,  8> Optype optype==ERRBAR;

__DefOpcode ERRBAR_X : [ERRBAR]
  __Encoding
    field<8,  4> SType stype==X;
  __OperandInfo
    InList<pg>;
    OutList<>;
    Order<pg>;
